In recent years, there has been a remarkable increase in the processing speed of writing data to, and reading data from, semiconductor memory devices.
Patent Document 1 discloses technology for a semiconductor memory device including memory cells connected to a plurality of word lines, where speeding up of data writing and reading is realized by specialization of 2 driver circuits in which a plurality of word lines can be controlled, with regard to respective writing and reading operations.    [Patent Document 1]    Japanese Patent Kokai Publication No. JP-H11-185489A